The grain boundaries （GBs） have a strong effect on the electric properties of ZnO thin film transistors （TFTs）. A novel grain boundary model was developed to analyse the effect. The model was characterized with different angles between the orientation of the grain boundary and the channel direction. The potential barriers formed by the grain boundaries increase with the increase of the grain boundary angle, so the degradation of the transistor characteristics increases. When a grain boundary is close to the drain edge, the potential barrier height reduces, so the electric properties were improved.
A battery drivable low-voltage transparent lightly antimony（Sb）-doped SnO2 nanowire electric-double-layer （EDL） field-effect transistor （FET） is fabricated on an ITO glass substrate at room temperature. An ultralow operation voltage of 1 V is obtained on account of an untralarge specific gate capacitance （- 2.14 μF/cm2） directly bound up with mobile ions-induced EDL （sandwiched between the top and bottom electrodes） effect. The transparent FET shows excellent electric characteristics with a field-effect mobility of 54.43 cm2/V. s, current on/off ration of 2 × 104, and subthreshold gate voltage swing （S = dVgs/d（logIds）） of 140 mV/decade. The threshold voltage Yth （0.1 V） is estimated which indicates that the SnO2 namowire transistor operates in an n-type enhanced mode. Such a low-voltage transparent nanowire transistor gated by a microporous SiO2-based solid electrolyte is very promising for battery-powered portable nanoscale sensors.
