An RF transmitter is proposed for 3-5 GHz time-hopping ultra wideband（TH-UWB） wireless applications.The transmitter consists of a 4-GHz oscillator, a switch with a controllable attenuator and an output matching circuit.Through controlling the low frequency signals with time-hopping pulse position modulation（TH-PPM）, the circuit supplies TH-UWB signals and can directly drive an antenna by a transmission line.The transmitter was implemented in a 0.18-μm CMOS technology;the output amplitude is about 65 mV at a 50 ？ load from a 1.8-V supply, the return loss（S 11） at the output port is less than-10 dB, and the chip size is 0.7 × 0.8 mm2, with a power consumption of 12.3 mW.
A MOS-NDR（negative differential resistance） transistor which is composed of four n-channel metaloxide -semiconductor field effect transistors（nMOSFETs） is fabricated in standard 0.35μm CMOS technology.This device exhibits NDR similar to conventional NDR devices such as the compound material based RTD（resonant tunneling diode） in current-voltage characteristics.At the same time it can realize a modulation effect by the third terminal. Based on the MOS-NDR transistor,a flexible logic circuit is realized in this work,which can transfer from the NAND gate to the NOR gate by suitably changing the threshold voltage of the MOS-NDR transistor.It turns out that MOS-NDR based circuits have the advantages of improved circuit compaction and reduced process complexity due to using the standard IC design and fabrication procedure.
A zero-pole cancellation transimpedance amplifier（TIA）has been realized in 0.35μm RF CMOS technology for Gigabit Ethernet applications.The TIA exploits a zero-pole cancellation configuration to isolate the input parasitic capacitance including photodiode capacitance from bandwidth deterioration.Simulation results show that the proposed TIA has a bandwidth of 1.9 GHz and a transimpedance gain of 65 dB·Ωfor 1.5 pF photodiode capaci- tance,with a gain-bandwidth product of 3.4 THz·Ω.Even with 2 pF photodiode capacitance,the bandwidth exhibits a decline of only 300 MHz,confirming the mechanism of the zero-pole cancellation configuration.The input resis- tance is 50Ω,and the average input noise current spectral density is 9.7 pA/√ Hz.Testing results shows that the eye diagram at 1 Gb/s is wide open.The chip dissipates 17 mW under a single 3.3 V supply.
