In this paper, an electrical resistance tomography(ERT) imaging method is used as a classifier, and then the Dempster-Shafer's evidence theory with fuzzy clustering is integrated to improve the ERT image quality. The fuzzy clustering is applied to determining the key mass function, and dealing with the uncertain, incomplete and inconsistent measured imaging data in ERT. The proposed method was applied to images with the same investigated object under eight typical current drive patterns. Experiments were performed on a group of simulations using COMSOL Multiphysics tool and measurements with a piece of porcine lung and a pair of porcine kidneys as test materials. Compared with any single drive pattern, the proposed method can provide images with a spatial resolution of about 10% higher, while the time resolution was almost the same.
With the device size gradually approaching the physical limit, the small changes of the Si(001)/SiO 2 interface in silicon-based devices may have a great impact on the device characteristics. Based on this, the bridge-oxygen model is used to construct the interface of different sizes, and the finite size effect of the interface between fine electronic structure silicon and silicon dioxide is studied. Then, the influence of the finite size effect on the electrical properties of nanotransistors is calculated by using the first principle. Theoretical calculation results demonstrate that the bond length of Si-Si and Si-O shows a saturate tendency when the size increases, while the absorption capacity of visible light and the barrier of the interface increase with the decrease of size. Finally, the results of two tunneling current models show that the finite size effect of Si(001)/SiO 2 interface can lead to a larger change in the gate leakage current of nano-scale devices, and the transition region and image potential, which play an important role in the calculation of interface characteristics of large-scale devices, show different sensitivities to the finite size effect. Therefore, the finite size effect of the interface on the gate leakage current cannot be ignored in nano-scale devices.
